Archive for the ‘Chip Design’ Category
Funding Fabless Semiconductor Startups
Here is something which we hear repeated often -
It costs 50-60M to fund a fabless semiconductor startup which means that there are very few opportunities to fund a semi startup.
I am sure the numbers have some element of truth to them. I asked the following question internally of my team -
Let’s say all the IP blocks were ready to go, and high quality verification IP were available for all interfaces, how much would it cost to build a fully-verified design for a chip with moderate complexity – ARM core, multiport DDR controller, PCIe controller, and mutiple channels of flash controller?
The estimate was in low single digit engineer-years. Say, with a fully loaded cost of 250K/yr, that is less than a million dollars! Here are some other costs -
- Development of differentiating IP
- IP acquisition cost, backend services (1-3M)
- Mask cost (say 500K for 90nm, < 1M for 65)
If you add up all the costs, you can get a chip delivered with say core IP development cost plus another 3-4M.
Now, where does the $50M number come from? I am assuming this number represents a VC’s expectation on amount of investment that would need to be made to take a product from initial design through volume production. There are a lot of costs which a startup would need to incur which are not listed above -
- Overhead – finance, management, sales, etc
- Course correction – it is very seldom that the original plan does not need to be adjusted to respond to a market condition.
- Reference design – this often carries a huge software development investment and can be a big expense if marketing needs a working prototype for tradeshows and customer engagements. You can often lose an entire generation of a chip while the reference design is being built.
- Pace of market development – As Paul Mclellan posted recently, startups are often too early to the market, not too late. Semis can be perishable commodity. Process shrink, change in interfaces, etc could mean that a chip that does not ship in volume right away might not ship at all before the next generation is delivered. That means all the mask cost, NRE, bringup cost, is all wasted.
I believe an investment model can and should emerge which addresses some of these anomalies -
- Need to make sure that a larger portion of investment and management focus goes into the “core”. Some sort of investment sharing along the lines of what Paul Slaby calls semi-fabless semiconductor model could be an interesting answer.
- “Staged” investment where the component with longer shelf life (i.e., differentiating IP) is invested with different financial risk-reward profile than the silicon itself. Former would mitigate technology risk, latter needs to be all about managing market risk. Most investments in fabless semis don’t work that way today.
- Just like we all accept 50 million dollar silicon cost as the final truth, here’s another: software development costs are skyrocketing. In order to make the sale, semis are expected to provide reference designs which include full software implementations. Semiconductor business success is all about shipping in volume because of the high NRE. The top-100 OEMs consume 70% of all semiconductors. A lot of these OEMs don’t even use the software from the semis but develop their own software as their differentiators. So, all that initial software investment by the semis is a) often impossible to monetize, and b) doesn’t even get used beyond tradeshows and sales demos. Needless to say, in a financially constrained environment, something needs to change.
I believe if we get creative about the current fabless investment model, not every semiconductor oppourtunity needs to be a billion dollar opportunity before it can attract meaningful investment.
